Analysis and Hardware Architecture Design of Global Motion Estimation

نویسندگان

  • Yi-Hau Chen
  • Shao-Yi Chien
  • Ching-Yeh Chen
  • Yu-Wen Huang
  • Liang-Gee Chen
چکیده

Global motion estimation and compensation (GME/GMC) is an important video processing technique and has been applied to many applications including video segmentation, sprite/mosaic generation, and video coding. In MPEG-4 Advanced Simple Profile (ASP), GME/GMC is adopted to compensate camera motions. Since GME is important, many GME algorithms have been proposed. These algorithms have two common characteristics, huge computation complexity and ultra large memory bandwidth. Hence for realtime applications, a hardware accelerator of GME is required. However, there are many hardware design challenges of GME like irregular memory access Y.-H. Chen · S.-Y. Chien · C.-Y. Chen Y.-W. Huang · L.-G. Chen DSP/IC Design Lab., Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan Y.-H. Chen e-mail: [email protected] C.-Y. Chen e-mail: [email protected] Y.-W. Huang e-mail: [email protected] L.-G. Chen e-mail: [email protected] S.-Y. Chien (B) Room 540, Department of Electrical Engineering II, National Taiwan University, 1, Sec. 4, Roosevelt Rd., Taipei 10617, Taiwan e-mail: [email protected] and huge memory bandwidth, and only few hardware architectures have been proposed. In this paper, we first analyzed three typical algorithms of GME, and a fast GME algorithm is proposed. By using temporal prediction and skipping the redundant computation, 91% memory bandwidth and 80% iterations are saved, while the performance is kept, compared to Gradient Descent in MPEG-4 Verification Model. Based on our proposed algorithm, a hardware architecture of GME is also presented. A new scheduling, Reference-Based Scheduling, is developed to solve the irregular memory access problem. An interleaved memory arrangement is applied to satisfy the memory access requirement of interpolation. The total gate count of hardware implementation is 131 K with Artisan 0.18 um cell library, and the internal memory size is about 7.9 Kb. Its processing ability is MPEG-4 ASP@L3, which is 352×288 with 30 fps, at 30 MHz.

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عنوان ژورنال:
  • Signal Processing Systems

دوره 53  شماره 

صفحات  -

تاریخ انتشار 2008